To reduce switching losses in power semiconductor devices, it is desired to reduce the distance between transistor cells of the power semiconductor device. One attempt to allow shrinkage of the transistor cells is to keep the size of the channel-forming region between adjacent trenches of the power semiconductor device small. As the size reduction, or pitch shrink, requires higher adjustment of the individual structures to be formed, self-adjusting processes are increasingly employed.
On consequence of the pitch-shrink of the transistor cells is the increase of the resistance of gate conductors or other conductive features. Typically, highly-doped polysilicon is used as conductive material for the gate conductors or other conductive features as polysilicon can be easy deposited and processed. However, the specific resistance of polysilicon increases disproportional with reducing cross-sectional area of the conductive structures made of polysilicon, because the influence of the polycrystalline structure of the polysilicon becomes more pronounced. Employment of metal as conductive material reduces the resistance but also brings about additional process problems.
In view of the above, there is a need for improvement.